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Wide Hysteresis
Application PoE/VoIP Device DPA423G
Design Idea DI-101 (R) DPA-Switch Under-Voltage with
Power Output Input Voltage 34-57 VDC Output Voltage Topology -
Design Highlights
* High hysteresis under-voltage lockout for Power over Ethernet (PoE) Powered Devices (PDs) * Turn-on threshold of 42 VDC and turn-off threshold of 34 VDC * Compliance to PoE standard (IEEE 802.3af) over complete voltage window ensures compatibility with PSE equipment. Tested by University of New Hampshire Interoperability Consortium (UNH-IOC)*
37 VDC (350 mA x 20 ). A minimum of 7 VDC undervoltage hysteresis is required to accommodate the cable drop voltage and prevent nuisance lockouts from occurring.
Operation
This circuit takes advantage of accurate DPA-Switch L-pin current sensing as the basis for a new composite threshold, programmed for 42 VDC turn-on and 34 VDC turn-off. The DPA-Switch detects the input voltage via current in the L-pin resistor RLS. Above an UV-on threshold (50 A), the DPA-Switch begins switching and below an UV-off threshold (47 A), the DPA-Switch is disabled. Transistor Q1 is turned on via bias resistor R2, causing a voltage drop across R3 and subtracting a fixed current of approximately 10 A (moving the effective threshold to 60 A) from the L-pin. When the power supply becomes operational, the bias voltage pulls up via R1, turning off Q1, cutting off the R3 current and returning to the default UV-off threshold (47 A).
Wide Hysteresis Under-Voltage
The default under-voltage lockout and overvoltage shutdown thresholds of the DPA-Switch are programmed with a single resistor (RLS) connected from the positive input voltage to the L-pin. The default overvoltage and under-voltage thresholds have a fixed ratio (ratio approximately 2.7:1). In a PoE system, the Power Sourcing Equipment (PSE) provides a minimum operating voltage of 44 VDC. However, the PoE specification allows CAT-5 (Ethernet) cable lengths up to 100 meters/ 300 ft (with up to 20 of cable impedance). At peak operating current (350 mA), the voltage at the PD can drop to approximately +
RLS 649 k 1%
ON IUV(ON) IOV(OFF) RLS Only
OFF
+
R3 174 k 1% Q1 MMST3906
C
0
25 47 A
50
75
100 131 A
125
150 135 A
IL
R1 10 k Bias Voltage ON
DC Input Voltage
D L
CONTROL
10 A RLS with Q1 Circuit
DPA-Switch
R2 10 k
-
S
PI-4064-111005
-
OFF 0 25 50 60 A 75 100 125 150 IL
Figure 1. DPA-Switch with Wide Hysteresis UVLO.
L Pin Current (A)
PI-4068-111005
Figure 2. L-Pin Current without/with Wide UVLO Circuit.
*UNH-IOC test reports are available on the PI website www.powerint.com/poe DI-101
www.powerint.com
November 2005
DI-101 Design Formulae
Component values can be calculated according to the following formulae and parameters: Design parameters were selected as follows: VUV_ON = 42 VDC VUV_OFF = 34 VDC VDIN = 1.4 VDC R1 = 10 k Input under-voltage on-threshold Default under-voltage offthreshold Diode drop for PoE reverse protection input diodes This value is assumed For design verification:
VUV_ON = c IUV_ON +
VL - VQ1(BE) m $ RLS + VL + VDIN R3
VUV_OFF = IUV_OFF $ RLS + VL + VDIN VOV_OFF = IOV_OFF $ RLS + VL + VDIN V $R VQ1(BE)REV = RBIAS R 2 - VL 1+ 2
From the DPA-Switch data sheet we have the following: IUV_ON = 50 A IUV_OFF = 47 A VL = 2.35 VDC VC = 5.8 VDC We can assume: VQ1(BE) = 0.6 VDC VQ1(BE)REV < 4 VDC = 100 Transistor base-emitter voltage 80% of the max reverse baseemitter voltage Transistor minimum current gain L-pin current for UV turn on L-pin current for UV turn off L-pin voltage at IL = IUV_ON Control-pin voltage
Key Design Points
* * * Use a 1% resistor for RLS to maintain the highest accuracy for the turn-on/turn-off thresholds. The over-voltage threshold is fixed at IOV_OFF = 135 A, and can be calculated according to the formula above (VOV_OFF). The bias voltage (VBIAS) is divided by R2 and R1. The reverse base emitter voltage VQ1(BE)REV is the divided bias voltage minus VL. Make sure VQ1(BE)REV stays below 5 V (the transistor rating). For PoE applications, make sure to include voltage drops of input diodes (VDIN) and pass-FET drop when calculating RLS. For non-PoE applications, assume VDIN = 0. Note: Due to the L-pin synchronization function (with a 1 V threshold), resistor R2 should be sufficiently large to prevent Q1 turn-on below L-pin voltage 1 V.
* *
Bias Voltage (VBIAS) = 8 VDC Resistor values RLS, R2 and R3 are calculated as follows:
RLS =
VUV_OFF - VL - VDIN IUV_OFF
^VL - VQ1(BE)h $ RLS R3 = V - IUV_ON $ RLS - VL - VDIN UV_ON
R1 $ ^VQ1(BE)REV + VLh R2 1 V - V - V BIAS L Q1 (BE) REV
For the latest updates, visit www.powerint.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. The products and applications illustrated herein (transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations' patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm.
The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, EcoSmart, Clampless, E-Shield, Filterfuse, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. (c)Copyright 2005, Power Integrations, Inc.
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